1. Field of the Invention
The present invention relates to a method of manufacturing a cavitied ceramic multilayer block for obtaining a cavitied ceramic multilayer circuit board which is adapted to form an IC package, and more particularly, it relates to an improvement in a pressing step which is carried out after stacking ceramic green sheets with each other.
2. Description of the Background Art
A ceramic multilayer circuit board, which is provided with wiring patterns in interfaces between ceramic layers forming the ceramic multilayer circuit board and via holes passing through specific ones of the ceramic layers for connecting the wiring patterns located above and under the ceramic layers, contributes to high densification of various electronic devices in circuit structure.. In order to attain further densification and composition of such a multilayer circuit board, there has been proposed a cavitied multilayer circuit board. According to such a cavited multilayer circuit board, it is possible to arrange another component such as an IC, for example, in the cavity, thereby attaining not only high densification but composition.
In order to obtain the aforementioned ceramic multilayer circuit board, a cavitied ceramic multilayer block must be manufactured. Such a cavitied ceramic multilayer block is basically manufactured through steps of stacking a plurality of ceramic green sheets with each other and pressing the as-obtained ceramic laminate. When the plurality of ceramic green sheets are successively stacked with each other, ceramic green sheets which are already provided with cavity holes for defining a cavity are stacked from an intermediate stage so that the ceramic laminate is provided with the cavity after such stacking. The cavitied ceramic laminate obtained in such a manner must then be pressed, so that the adhesion between the plurality of ceramic green sheets forming the laminate is improved. FIG. 3 is a sectional view showing an example of a conventional pressing method.
A ceramic laminate 1 shown in FIG. 3 comprises a plurality of ceramic green sheets 2 provided with no cavity holes, a plurality of ceramic green sheets 4, which are stacked thereon, provided with cavity holes 3, a plurality of ceramic green sheets 6, which are stacked thereon, provided with cavity holes 5 larger than the cavity holes 3, and a plurality of ceramic green sheets 8, which are stacked thereon, provided with cavity holes 7 larger than the cavity holes 5. The ceramic laminate 1 is provided with a cavity 9 which is defined by an assembly of the cavity holes 3, 5 and 7.
The aforementioned ceramic laminate 1 is introduced into a die 10, and an elastic member 11 which is identical in outside dimension to the ceramic green sheets 2, 4, 6 and 8 is placed thereon. Then, the elastic member 11 exerts a pressure onto the ceramic green sheets 2, 4, 6 and 8, thereby pressing the ceramic green sheets 2, 4, 6 and 8. The elastic member 11 is also used to exert a desired pressure into the cavity 9.
The ceramic green sheets 2, 4, 6 and 8 may alternatively be stacked with each other in the die 10.
Conductive patterns, wiring patterns and via holes which are formed in the interior or on the surface of the ceramic laminate 1 are omitted from FIG. 3.
A cavitied ceramic multilayer block obtained by pressing the ceramic laminate 1 as shown in FIG. 3 is then fired, thereby obtaining a desired cavitied ceramic multilayer circuit board.
However, the method of manufacturing a cavitied ceramic multilayer block employing the aforementioned pressing method has the following problems. FIG. 4 is an enlarged sectional view showing behavior of the elastic member 11 which is used in the pressing step shown in FIG. 3.
As shown in FIG. 4, the ceramic laminate 1 is pressed when the elastic member 11 exerts a pressure onto the ceramic laminate 1 along arrows 12. At this time, the elastic member 11 exerts the pressure not only in the direction of lamination as shown by arrows 13 but in directions for radially expanding the cavity 9 as shown by arrows 14, due to its freely deformable property. Consequently, wiring patterns (not shown) which are provided around the cavity 9 may be undesirably deformed so that the wiring patterns are misaligned with via holes to cause imperfect conduction therebetween and defective characteristics are caused by changes of spaces between the wiring patterns, while a tandem state of the via holes along the direction of lamination may be broken to cause imperfect conduction.
Further, corners of stages which are formed in the cavity 9 may be rounded because of the deformation of the elastic member 11. While wiring patterns are formed on the respective stages of the cavity 9 to be connected with an electronic component which is arranged in the cavity 9 by wire bonding, reliable wire bonding cannot be performed if the surfaces provided with the wiring patterns are rounded as described above. To this end, the stages of the cavity must be increased in width so that the wiring patterns are not influenced even if the corners of the stages of the cavity 9 are rounded. In this case, however, allowance is required in the design of the multilayer circuit board, to hinder high densification and miniaturization thereof.
In addition, the elastic member 11 may not necessarily be homogeneously deformed when the elastic member 11 is compressed. When the elastic member 11 is inhomogeneously deformed, the wiring patterns which are in contact with the elastic member may also be inhomogeneously deformed following the inhomogeneous deformation of the elastic member 11. Thus, the electronic component which is arranged in the cavity may be misregistered with the wiring patterns, to cause imperfect conduction. When resistors, for example, are printed in relation to such wiring patterns, resistance values supplied by the resistors may disadvantageously deviate from desired levels, in addition to the creation of imperfect conduction between the resistors and the wiring patterns.
Even if the thicknesses of the wiring patterns are relatively largely superposed in a specific portion of the ceramic laminate 1, further, the elastic member 11 which is deformed itself may absorb the thicknesses of the wiring patterns to define an undesirable projection in the specific portion of the ceramic laminate 1 after pressing. Such a projection causes variation in the height of the electronic component which is arranged in the cavity 9 resulting in erroneous interconnection by wire bonding, or dispersion in the thickness of resistor films in printing of the resistors.